An interposer is an electrical interface providing routing between one socket or connection to another. The purpose of an interposer is generally to spread a connection to a wider pitch or to reroute a connection to a different connection. A typical interposer example application is for providing routing between an integrated circuit (IC) die to a ball grid array (BGA) on a substrate, such as the IC die on the interposer on a BGA substrate.
In a conventional method for forming interposers, through-vias are formed, which are dielectric lined, and then the dielectric lined vias are filled with a metal. For example, a silicon wafer may be thinned, such as from a thickness of about 800 μm to about 150 to 250 μm to remain rigid enough still be able to handled without a support carrier. Silicon through-vias are then formed by deep reactive ion etching (DRIE) process. A convention DRIE process is a Bosch process for forming through vias in silicon substrates which uses a fluorine based plasma chemistry to etch the silicon, combined with a fluorocarbon plasma process to provide sidewall passivation and improved selectivity to masking materials. A complete etch process cycles between etch and deposition steps many times to achieve deep, substantially vertical etch profiles. The Bosch process offers higher etch rates, but at the cost of sidewall roughness in the form of scalloping.
A dielectric layer (e.g., SiO2) is then formed by conventional thermal oxidation or a deposition process to dielectric line the through-vias. Alternatively, use of a dielectric (e.g., glass) substrate allows through-via formation without the need for a dielectric lining.
In the case of silicon substrates, through-silicon vias (TSVs) are then formed by filling the dielectric lined vias, such as by a copper (Cu) seed layer followed by Cu electroplating, and then planarization using chemical mechanical polishing (CMP). For dielectric substrates, the through-vias are analogously metal filled.
Multilayer wiring on one or both sides of the interposer can then be formed by Cu plating using a conventional semi additive process (SAP). Micro bumps can then be fabricated on the top side of the interposer by electroplating, which allows IC chip(s) to be mounted on the top side of the interposer.